A sequence detector is an example of Finite State Machine because during its operation it undergoes through finite number of states before outputting signal that it has detected a particular sequence.
Consider the figure below which is a sequence detector. The input to this sequence detector is a binary data streams(maybe 01011010101111001010001111) and it has additional two inputs a reset and a clock. The reset when applied puts the sequence detector to a known state. And if the detector detects 111 in sequence then it outputs a 1.
The design of a sequence detector like the one shown above starts with drawing a state diagram from the problem specification. For a sequence detector for example, the question can be specified as design a circuit that detects three consecutive 1s and outputs 1 when the sequence is detected. So in this case the problem can be solved using FSM.
An example of a state diagram is shown below.
Once we have the state diagram, the next step is to draw a state table from the state diagram. The state table contains the same information as the state diagram. The advantage of using now a state table is that it facilitates in deriving next state logic equation and output equation. By contrast a state diagram facilitates in drawing a map of the problem.
A state table for the above state diagram looks like the following:
The next step is to choose the type of flip flop to use for the states. A D flip flop provides the simplest implementation but many times other flip flop such as JK flip flop is more useful as it reduces the combinational circuit implementation as in case of a counter design.
Once you have the state table the next step is to assign state variables to the states. Note that here there are two types of state variables- one for the present state and one for the next state. Following shows the update state table with state assignments-
Note that the output z column does not have any input x indicated because the design is of Moore type.
After assigning the state variables, the next state variables are solved as a function of the present state variables and the input variables. The tool used to solve the state variables is the commonly used Boolean function solver like the Karnaugh Map.
Finally the circuit is drawn from the knowledge of the next state logic equation and the output equation.
The following shows the simulated waveform obtained.
Consider the figure below which is a sequence detector. The input to this sequence detector is a binary data streams(maybe 01011010101111001010001111) and it has additional two inputs a reset and a clock. The reset when applied puts the sequence detector to a known state. And if the detector detects 111 in sequence then it outputs a 1.
The design of a sequence detector like the one shown above starts with drawing a state diagram from the problem specification. For a sequence detector for example, the question can be specified as design a circuit that detects three consecutive 1s and outputs 1 when the sequence is detected. So in this case the problem can be solved using FSM.
An example of a state diagram is shown below.
Once we have the state diagram, the next step is to draw a state table from the state diagram. The state table contains the same information as the state diagram. The advantage of using now a state table is that it facilitates in deriving next state logic equation and output equation. By contrast a state diagram facilitates in drawing a map of the problem.
A state table for the above state diagram looks like the following:
The next step is to choose the type of flip flop to use for the states. A D flip flop provides the simplest implementation but many times other flip flop such as JK flip flop is more useful as it reduces the combinational circuit implementation as in case of a counter design.
Once you have the state table the next step is to assign state variables to the states. Note that here there are two types of state variables- one for the present state and one for the next state. Following shows the update state table with state assignments-
Note that the output z column does not have any input x indicated because the design is of Moore type.
After assigning the state variables, the next state variables are solved as a function of the present state variables and the input variables. The tool used to solve the state variables is the commonly used Boolean function solver like the Karnaugh Map.
Finally the circuit is drawn from the knowledge of the next state logic equation and the output equation.
The following shows the simulated waveform obtained.
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